Semantic scholar extracted view of faulttolerance techniques for sram based fpgas by ricardo p. The new technique proposed in this paper was specifically developed for. These techniques are based on circuit level modifications with obvious modifications in the programmable architecture or. Fpgas to cope with transient faults in the user combinational and sequential logic, while.
Sram based fpgas are prone to both transient and permanent faults. Masterslave tmr inspired technique for fault tolerance of sram. Inputoutput logic based faulttolerant design technique for srambased fpgas aditya srinivas timmaraju, deshmukh aniket anand, mohammed amir khan, zafar ali khan abstracteffects of radiation on electronic circuits used in extraterrestrial applications and radiation prone environments need to be corrected. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. Inputoutput logic based faulttolerant design technique. An adaptive method to tolerate soft errors in srambased fpgas. Faulttolerance techniques for srambased fpgas fernanda. Several faulttolerant methods to tolerate seu effects have been proposed previously. Fpgas, without modifications in the fpga architecture, able. It starts by showing the model of the problem and the upset effects in the programmable architecture.
Srambased fpgas are sensitive to transient faults, so called soft errors. Designing faulttolerant techniques for srambased fpgas ieee. Designing and testing faulttolerant techniques for srambased. This chapter will present a set of fault mitigation techniques for sram, flash and antifusebased fpgas and a test methodology to characterize those fpga under radiation.
Designing faulttolerant techniques for srambased fpgas. This article presents a fault tolerance technique for transient and permanent faults in srambased fpgas. Section 5 introduces a new highlevel technique for designing faulttolerant systems for srambased. Request pdf faulttolerance techniques for srambased fpgas faulttolerance in integrated circuits is no longer the exclusive concern of space designers or highlyreliable applications engineers. Designing fault tolerant systems into srambased fpgas. There are two ways to implement faulttolerant designs in srambased. Designing and testing faulttolerant techniques for srambased fpgas fernanda lima kastensmidt1 gustavo neuberger2 luigi carro2 ricardo reis2 1universidade estadual do rio grande do sul engenharia. Designing faulttolerant techniques for srambased fpgas article pdf available in ieee design and test of computers 21. Soft error rate and fault tolerance techniques for fpgas.
Different fault tolerance techniques can be applied to fpgas according to their type of configuration technology, architecture and target operating environment. Faulttolerance techniques for srambased fpgas request pdf. This technique combines duplication with comparison dwc and. Designing and testing faulttolerant techniques for sram.
This technique combines duplication with comparison. Fault tolerance designing faulttolerant techniques for. The redundant circuit is too big to download onto the fpga, since methods. Pdf designing faulttolerant techniques for srambased fpgas. In order to increase reliability and availability of staticram based field programmable gate arrays srambased fpgas, several methods of tolerating defe. Other ft techniques for srambased fpgas are discussed in 19,20. A read is counted each time someone views a publication summary such as the title, abstract, and list of authors, clicks on a figure, or views or downloads the fulltext. This book discusses faulttolerance techniques for srambased field programmable gate arrays fpgas. Semantic scholar extracted view of faulttolerance techniques for srambased fpgas by ricardo p. Among srambased fpga alternatives, xilinx virtex45qv series are found to have the highest logic density, performance and radiationtolerance altogether. We present a fault tolerance technique for transient and permanent faults in srambased fpgas. Fpgas have become prevalent in critical applications in which transient faults can seriously affect the circuits operation.
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